Printed electrical circuits, including both rigid and flexible circuits, generally comprise a pattern of electrical conductors or conductive traces carried by and bonded to a dielectric substrate. Printed circuitry at present, whether flexible or formed on a relatively rigid board, is made by well known photolithographic and etching processes (Print & Etch). Conventional steps employed in such processes include covering a dielectric substrate with a coat of conductive material, such as copper, which will form the traces of the circuit, and then coating the copper with a photosensitive etch resist. Art work in the form of a mask having a pattern of optically opaque and optically transparent portions formed therein is applied over the resist, and the latter is then optically exposed through the mask so that portions of the resist which have been exposed to light may be developed. Those portions of the resist which have not been exposed and developed are then removed to leave a positive pattern of resist on the copper surface. The assembly of substrate, copper and positive pattern of resist is then subjected to etching fluids which do not affect the resist but which remove the copper in areas not covered by the resist. The developed resist is then stripped to provide the desired pattern of copper conductors or traces bonded to the dielectric substrate.
Conventional etched circuit processes have a number of disadvantages. Dimensional precision of the etched circuit is difficult to achieve. The use of various etching, stripping and cleaning fluids require special handling of hazardous chemicals. Techniques for disposal of the resulting effluents are complex and expensive and subject to strict government controls. Etched circuit processing may have a relatively low yield, greatly increasing the cost of the processing which inherently involves a large number of costly processing steps.
Still other problems exist in certain applications. A significant problem in etching of fine line features is the difficulty of obtaining desired precision of fine geometry of the etched traces and, in particular, the difficulty of obtaining traces of a precise rectangular cross-sectional configuration. This problem of trace cross-section is caused by lateral etch. Lateral etch occurs because the etching fluid acts in all directions and not only removes metal downwardly, but removes metal to the sides of the exposed area. Lateral or sideways etch can be expressed as the amount of etching under a resist pattern when the surface is etched. Etch factor has been defined as the depth of etch divided by the amount of sideways growth when a material is etched. It is calculated from one edge of an etched area only. Thus, an etch factor of 2 means that the depth of etch in a material is twice as large as the undercutting of the resist edge. For those traces that are etched on two sides, the total lateral etch and thus the total decrease in width of the line is doubled. Moreover, the surface of the etch is not straight, but is curved in a manner that is difficult to precisely predetermine. Frequently a series of tests must be run to determine the amount and nature of the lateral etch. The etching artwork or masking must be compensated for empirically determined lateral etch. Complex compensatory arrangements have been followed to attempt to obtain straight, smooth conductor walls and to minimize the amount of inclination of the resulting trapezoidal cross-sectioned conductors.
Still another dimensional limitation of the etching process is its limited resolution. Using conventional etching processes, a minimum width of trace is on the order of 4 to 5 mils which may be inadequate because desired circuit components are continuously decreasing in size and increasing in density, thereby requiring higher and higher resolution.
Electrical circuits of higher frequency and speed require transmission lines capable of providing signals with matched impedance. The characteristic impedance of a circuit is determined by the dielectric constant of the insulation and geometries and spatial distribution of ground and signal lines. These more stringent requirements of geometry and spatial distribution are extremely difficult if not impossible to meet using conventional etching processes.
Accordingly, it is an object of the present invention to provide methods and apparatus that avoid or minimize above mentioned problems.